adder的例句大全

Full adders are discussed, and a multiplexer based full adder is designed.

文章讨论几种全加器的设计, 并设计了一种基于数据选择器的全加器.

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An adder attacked my father.

一条小毒蛇攻击了我父亲.

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Switched capacitor ( SC ) unit delayed, positive negative proportions and adder were designed using two phase clocks.

用二相时钟设计了对寄生电容低灵敏的开关电容单位延时器 、 正负比例器和加法器.

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NIV He will suck the poison of serpents; the fangs of an adder will kill him.

16[和合]他必吸饮虺蛇的毒气, 14蝮蛇的舌头也必杀他.

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Results show that the novel structure can realize the logic function of an adder successfully.

结果显示,这种新的全加器能正确完成加法器的逻辑功能.

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Load the data to accumulator or adder according to the instruction.

将在存贮器数据寄存器的数据,根据指令载入加法器或累加器.

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The adder is also the only British snake with a poisonous bite.

蝰蛇在英国也是唯一一种有毒的蛇.

中级百科部分

A fast 64 bit binary parallel adder for high performance microprocessors and DSP processors is presented.

介绍了一个用于高性能的微处理器和DSP处理器的快速64位二进制并行加法器.

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He will suck the poison of serpents ; the fangs of an adder will kill him.

16他必吸饮虺蛇的毒气.蝮蛇的舌头也必杀他.

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Aging factors on the role of the lives of repeated or supply process called " Adder. "

加龄因素对生命的不断重复作用或供应过程,叫作 “ 加法 ”.

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Many say this, but I'm looking a longterm adder as well.

许多人这样说, 但我一看,以及长期加法器.

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Switched capacitor ( SC ) unit delayer , positive negative proportors and adder were designed using two phase clocks.

用二相时钟设计了对寄生电容低灵敏的开关电容单位延时器 、 负比例器和加法器.

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The circuits of 16 bit adder and 8 bit multiplier are successfully evolved.

采用生长进化方法成功地进化出了16位加法器和8位乘法器.

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This process requires that the adder used in multibit addition handle three inputs.

这就要求用于多位数相加的加法器具有三个输入端.

词典精选例句

Why, thou art as foul as the toal, and as loathsome as the adder.

看啊, 你跟蟾蜍一样地难看, 跟毒蛇一样地可恶.

词典精选例句

By far the most common snake in Britain is the adder.

在英国最常见的蛇是蝰蛇.

The adder is Britain's only venomous snake.

蝰蛇是英国唯一的一种毒蛇。

If bit by adder or ancistrodon acutus, elimination of toxicant by puncturing is not conducted generally, since the two species contain the bleeding toxin which may cause non-stopping bleeding.

被蝰蛇，五步蛇咬伤，一般不作刀刺排毒，因为它们是出血毒类型，会造成出血不止。

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By analyzing every part of △∑ D/ A converter, it is demonstrated that power consumption is mainly produced by the full-adder and register of digital part.

通过对各个部分的功耗分析表明，电路功耗主要由数字部分的全加器和寄存器产生。

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Based on logic gates of complementary single-electron transistor ( SET), three units are proposed as follows: full adder, shift register and ROM.

基于互补型单电子晶体管（SET）逻辑门，提出了SET加法器、移位寄存器和ROM的单元电路。

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