vls

Test is an indispensable task of VLSI circuits design.

测试是超大规模集成电路(VLSI, VeryLargeScaleIntegrationCircuits)设计中不可缺少的重要环节.

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This thesis deals with two optimal algorithms of Non-Manhattan channel routing in VLSI physics design.

本文论述了VLSI物理 设计中两种基于 非 曼哈顿结构的通道布线优化算法研究和实验结果及分析.

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The LDD MOSFET is a suitable structure for VLSI.

这些优点意味着LDDMOSFET结构在VLSI中 有着广泛的应用前景.

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At last also forecasted the developing trend of the VLSI testing technology.

最后预计了VLSI测试技术的发展趋势.

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Low Power VLSI Design For Multimedia Applications complete source code, has been tested.

低功耗VLSI设计的多媒体应用完整的源代码, 已经过测试.

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The idea of Appel's hierarchical algorithm handling the many body problem is implemented in the direct boundary element method ( BEM) for computation of 3 D VLSI parasitic capacitance.

文中将Appel处理多体问题的层次式算法思想实现于直接边界元法，用以计算VLSI三维互连寄生电容。

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This paper comprehensively introduced various VLSI testing approaches, and analyzed advantage and disadvantage.

本文较全面的介绍了各种VLSI测试方法, 并分析了各自的特点.

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With the rapid development of nanometer technology, the design of VLSI meets a great deal challenge.

纳米技术的飞速发展对超大规模集成电路(vlsi)设计技术提出了越来越大的挑战.

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In VLSI design flow, design rule checking ( DRC ) is an important step.

在超大规模集成电路(VLSI)设计流程中, 设计规则检查 ( DRC ) 是关键一环.

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VLSI floorplan optimization design with soft blocks

带软模块的VLSI布图规划优化设计

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Boundary scan testing based on design-for-testability is a new method to test VLSI. This method can greatly reduce the complexity of VLSI test generation, so it has been studied extensively in the fields of design and test of integrated circuit in recent years.

边缘扫描测试是对大规模集成电路（VLSI）进行测试的一种新的基于可测性设计的测试技术，能极大地降低VLSI测试生成的复杂性，在电路设计与测试领域，近年来得到广泛关注。

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Volume location server ( vlserver)& Maintains volume location database ( VLDB) to track all information about volumes and their location on a file server.

卷位置服务器（vlserver）&负责维护卷位置数据库（VLDB）来跟踪有关卷及其在文件服务器上的位置的所有信息。

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A novel divider based on dual-bit algorithm and its VLSI implementation are presented.

提出了基于双比特算法的新型除法器及其VLSI实现结构.

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VLS is a linear type sensor that detects an absolute position.

VLS是一种直线型绝对值编码器.

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A effective VLSI floor planning method based on Genetic Algorithms was presented in this paper.

提出了一种有效的基于遗传算法的VLSI布图规划方法.

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Research of Scheduling Using Multiple Voltage at Behavior Level in VLSI Design for Low Power

VLSI行为层的多电压低功耗调度研究

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The parallel perturbation technique is well-suited to mixed mode VLSI implementation.

该并行扰动技术非常适合于用混模VLSI实现.

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The attack-resistant VLSI design also studied in this paper.

本文也研究了如何合理地将防御攻击技术转化为具体的VLSI设计.

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A new integrated services digital PABX is introduced in this paper.

该PABX是一种适用于ISDN的 数字交换系统,采用当前国际上最新推出的VLSI芯片设计而成.

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Implement floorplan for VLSI with object-oriented methods

用面向对象方法实现VLSI布图规划

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